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GayaGnan

🎓 B.Tech Engineering Labs

124 virtual experiments that compute for real in your browser: a SPICE-style circuit solver, FEA, lattice-Boltzmann CFD, heat transfer, cycle analysis, robot kinematics, a G-code CNC, DSP and BER, antennas, PID, embedded C compiled by Clang, and Verilog synthesised by Yosys. Every experiment has its own live 3D bench.

How these labs are real

  • Electronics / ECE: modified nodal analysis with Newton–Raphson (diodes, Zener, BJT, op-amp), transient and AC analysis; radix-2 FFT, windowed-sinc FIR and bilinear Butterworth IIR; Monte Carlo BER checked against erfc theory.
  • Mechanical: direct-stiffness FEA (matches beam formulas to 5 digits), lattice-Boltzmann D2Q9 CFD (Strouhal ≈ 0.167 at Re 100), finite-difference heat conduction, air-standard cycles, RK4 vibration, analytic inverse kinematics, a G-code interpreter.
  • Embedded: your C is compiled by Clang (WebAssembly) and runs against virtual time; UART/SPI/I2C/CAN frames with real CRC-15 and bit stuffing; RTOS scheduling with priority inheritance.
  • VLSI: Yosys synthesises your Verilog to gates in the browser; the gate netlist is simulated cycle by cycle with checks and exported as VCD.

These are teaching simulations. They are not certified SPICE, FEA, CFD or sign-off EDA tools, and simulated values are not physical measurements.