EL15 · Sem 4 · Analog circuits

BJT common-emitter amplifier

Aim: Bias an NPN transistor and measure its voltage gain.

🧪 Live simulation🧊 Real-time 3D bench⚠ Simulated values, not physical measurements

🔬 Virtual lab

Starting the lab…

📘 Theory

A voltage divider fixes the base voltage; the emitter resistor stabilises the collector current. With the emitter bypassed, small-signal gain is about −gm·RC = −(IC/VT)·RC. The output is inverted.

IC ≈ (VB − 0.65)/RE · gm = IC/VT · Av ≈ −gm·RC

🧰 Apparatus (virtual)

NPN transistor (β ≈ 150)
100 kΩ/22 kΩ divider
4.7 kΩ collector
1 kΩ emitter + 100 µF bypass
10 mV 1 kHz input
oscilloscope

📝 Procedure

Run and check the DC collector voltage (about half of VCC is ideal)
Measure the output peak-to-peak and divide by the 20 mV input
Compare with gm·RC
Increase the input amplitude until the output clips

Observations and result (kept on this device)

🎤 Viva questions

Why is the emitter resistor bypassed

To remove its negative feedback at signal frequencies and get high gain.

What happens if the bias puts VC near VCC

The output clips early on one side.

🛡️ Safety

Virtual lab at safe low voltages. On a real bench: switch off before rewiring, check capacitor polarity, and never touch mains wiring without supervision.