VL13 · Sem 5 · VLSI design
LFSR pseudo-random generator
Aim: Generate a pseudo-random sequence with a linear-feedback shift register.
🧪 Live simulation🧊 Real-time 3D bench⚠ Simulated values, not physical measurements
🔬 Virtual lab
Starting the lab…
📘 Theory
An LFSR feeds back the XOR of selected bits (taps). With the right taps a 4-bit LFSR visits all 15 non-zero states before repeating: used for BIST, scrambling and test patterns.
x⁴ + x³ + 1 (taps 4 and 3)
🧰 Apparatus (virtual)
- Yosys
- simulator
📝 Procedure
🎤 Viva questions
Why must the LFSR never be all zeros
It would stay stuck at zero forever.
What is BIST
Built-in self-test: on-chip pattern generators and checkers.
🛡️ Safety
Software only. Area and timing use generic teaching assumptions; they are not silicon measurements or sign-off results.