VL07 · Sem 4 · Digital design
Magnitude comparator
Aim: Compare two 4-bit numbers.
🧪 Live simulation🧊 Real-time 3D bench⚠ Simulated values, not physical measurements
🔬 Virtual lab
Starting the lab…
📘 Theory
Relational operators (<, ==, >) synthesise to subtract-and-check logic. A comparator is the heart of sorting networks and limit detectors.
lt = a < b, eq = a == b, gt = a > b
🧰 Apparatus (virtual)
- Yosys
- simulator
📝 Procedure
🎤 Viva questions
How is equality checked in gates
XNOR each bit pair and AND the results.
How many outputs are 1 at once
Exactly one.
🛡️ Safety
Software only. Area and timing use generic teaching assumptions; they are not silicon measurements or sign-off results.