VL08 · Sem 4 · Computer architecture
4-bit ALU
Aim: Build an ALU with add, subtract, AND and XOR, plus a zero flag.
🧪 Live simulation🧊 Real-time 3D bench⚠ Simulated values, not physical measurements
🔬 Virtual lab
Starting the lab…
📘 Theory
An ALU is a set of operations selected by an opcode. A case statement inside always @(*) describes it; synthesis shares hardware where it can. The zero flag supports branch instructions.
op: 0 add, 1 sub, 2 and, 3 xor · Z = (y == 0)
🧰 Apparatus (virtual)
- Yosys
- simulator
📝 Procedure
🎤 Viva questions
Why does a CPU need a zero flag
For conditional branches like “branch if equal”.
How is subtraction done in hardware
Add the two’s complement: a + ~b + 1.
🛡️ Safety
Software only. Area and timing use generic teaching assumptions; they are not silicon measurements or sign-off results.