VL18 · Sem 3 · Digital logic
Even parity generator
Aim: Compute a parity bit for error detection.
🧪 Live simulation🧊 Real-time 3D bench⚠ Simulated values, not physical measurements
🔬 Virtual lab
Starting the lab…
📘 Theory
The XOR of all data bits is 1 when there is an odd number of ones. Adding it makes the total even, so any single-bit error is detected (but not corrected).
p = d₀ ⊕ d₁ ⊕ … ⊕ d₇ (reduction ^d)
🧰 Apparatus (virtual)
- Yosys
- simulator
📝 Procedure
🎤 Viva questions
Can parity detect two-bit errors
No: two flips cancel.
What can correct single-bit errors
Hamming (SEC) codes.
🛡️ Safety
Software only. Area and timing use generic teaching assumptions; they are not silicon measurements or sign-off results.